tilelang.intrinsics.wmma_layout¶
Layout functions for AMD RDNA WMMA instructions (gfx11/gfx12).
EMPIRICALLY VERIFIED hardware layouts for wmma_f32_16x16x16_f16_w32_gfx12:
- A[M=16][K=16]:
thread t, elem e -> A[M=t%16][K=(t//16)*8+e] Forward: (M, K) -> (thread=(K//8)*16+M, local=K%8) Reverse: (thread, local) -> (M=thread%16, K=(thread//16)*8+local) Memory load: A[M=t%16][K=(t//16)*8..+7] -> CONTIGUOUS in K (vectorized)
- B[K=16][N=16] (non-transposed, K x N storage):
thread t, elem e -> B[K=(t//16)*8+e][N=t%16] Forward: (K, N) -> (thread=(K//8)*16+N, local=K%8) Reverse: (thread, local) -> (K=(thread//16)*8+local, N=thread%16)
- B_T[N=16][K=16] (transposed storage of B):
B_T[N=t%16][K=(t//16)*8+e] -> CONTIGUOUS in K (vectorized)
- D[M=16][N=16]:
thread t, elem l -> D[M=(t//16)*8+l][N=t%16] Forward: (M, N) -> (thread=(M//8)*16+N, local=M%8) Reverse: (thread, local) -> (M=(thread//16)*8+local, N=thread%16) Store: D[M=(t//16)*8+l][N=t%16] = d_vec[l]
EMPIRICALLY VERIFIED hardware layouts for wmma_f32_16x16x16_f16_w32 (gfx11):
- A[M=16][K=16]:
thread t, elem e -> A[M=t%16][K=e] Forward: (M, K) -> (thread=M, local=K%16) [Mapping to tid=0~15] Reverse: (thread, local) -> (M=thread%16, K=local) Memory load: A[M=t%16][K=0..+15] -> CONTIGUOUS in K (vectorized)
- B[K=16][N=16] (non-transposed, K x N storage):
thread t, elem e -> B[K=e][N=t%16] Forward: (K, N) -> (thread=N, local=K%16) [Mapping to tid=0~15] Reverse: (thread, local) -> (K=local, N=thread%16)
- B_T[N=16][K=16] (transposed storage of B):
B_T[N=t%16][K=e] -> CONTIGUOUS in K (vectorized)
- D[M=16][N=16]:
thread t, elem l -> D[M=(t//16)+l*2][N=t%16] Forward: (M, N) -> (thread=(M%2)*16+N, local=M//2) Reverse: (thread, local) -> (M=(thread//16)+local*2, N=thread%16) Store: D[M=(t//16)+l*2][N=t%16] = d_vec[l]
NOTE: 1. A and D have DIFFERENT layouts (e.g. For gfx12, A uses t%16 for M,
D uses (t//16)*8+l for M). This means they cannot be used interchangeably without a layout change.
For gfx11, lane 16~31 share the same A/B data as lane 0~15.
local_size = 8 (gfx12) | 16 (gfx11)
Functions¶
Forward: A[i=M, j=K] -> (thread=(j//8)*16+i, local=j%8). |
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Reverse: (thread, local) -> (i=M=thread%16, j=K=(thread//16)*8+local). |
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Forward: A_T[i=K, j=M] -> (thread=(i//8)*16+j, local=i%8). |
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Reverse: (thread, local) -> (i=K=(thread//16)*8+local, j=M=thread%16). |
Forward: B[i=K, j=N] -> (thread=(i//8)*16+j, local=i%8). |
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Reverse: (thread, local) -> (i=K=(thread//16)*8+local, j=N=thread%16). |
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Forward: B_T[i=N, j=K] -> (thread=(j//8)*16+i, local=j%8). |
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Reverse: (thread, local) -> (i=N=thread%16, j=K=(thread//16)*8+local). |
Forward: D[i=M, j=N] -> (thread=(i//8)*16+j, local=i%8). |
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Reverse: (thread, local) -> (i=M=(thread//16)*8+local, j=N=thread%16). |
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(thread, local) -> (M, N) in D. Hardware D layout. |
Forward: A[i=M, j=K] -> (thread=i, local=j%16). |
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Reverse: (thread, local) -> (i=M=thread%16, j=K=local) |
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Forward: A_T[i=K, j=M] -> (thread=M, local=K%16). |
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Reverse: (thread, local) -> (i=K=local, j=M=thread%16) |
Forward: B[i=K, j=N] -> (thread=N, local=K%16). |
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Reverse: (thread, local) -> (i=K=local, j=N=thread%16) |
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Forward: B_T[i=N, j=K] -> (thread=i, local=j%16). |
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Reverse: (thread, local) -> (j=K=local, i=N=thread%16) |
Forward: D[i=M, j=N] -> (thread=(i%2)*16+j, local=i//2). |
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Reverse: (thread, local) -> (i=M=(thread//16)+local*2, j=N=thread%16) |
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(thread, local) -> (M, N) in D. Hardware D layout. |
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Replicated fragment forward map for gfx11 A. |
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Replicated fragment forward map for gfx11 transposed A. |
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Replicated fragment forward map for gfx11 B. |
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Replicated fragment forward map for gfx11 transposed B. |
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Return (forward_map, reverse_map) for A layout. |
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Return (forward_map, reverse_map) for B layout. |
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Return (forward_map, reverse_map) for C/D layout. |
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Return the (thread_id, local_id) -> (row, col) store map. |
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Return the fragment forward function for A layout. |
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Return the fragment forward function for B layout. |
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Return the fragment replicate count used for logical one-to-many owners. |
Module Contents¶
Forward: A[i=M, j=K] -> (thread=(j//8)*16+i, local=j%8).
Reverse: (thread, local) -> (i=M=thread%16, j=K=(thread//16)*8+local).
Forward: A_T[i=K, j=M] -> (thread=(i//8)*16+j, local=i%8).
Reverse: (thread, local) -> (i=K=(thread//16)*8+local, j=M=thread%16).
Forward: B[i=K, j=N] -> (thread=(i//8)*16+j, local=i%8).
Reverse: (thread, local) -> (i=K=(thread//16)*8+local, j=N=thread%16).
Forward: B_T[i=N, j=K] -> (thread=(j//8)*16+i, local=j%8).
Reverse: (thread, local) -> (i=N=thread%16, j=K=(thread//16)*8+local).
Forward: D[i=M, j=N] -> (thread=(i//8)*16+j, local=i%8).
Reverse: (thread, local) -> (i=M=(thread//16)*8+local, j=N=thread%16).
- tilelang.intrinsics.wmma_layout.wmma_store_index_map_gfx12(thread_id, local_id)¶
(thread, local) -> (M, N) in D. Hardware D layout.
Forward: A[i=M, j=K] -> (thread=i, local=j%16). ATTN: Here we only reflect (i, j) to the lower-half-lane of threads in a warp.
Reverse: (thread, local) -> (i=M=thread%16, j=K=local)
Forward: A_T[i=K, j=M] -> (thread=M, local=K%16). ATTN: Here we only reflect (i, j) to the lower-half-lane of threads in a warp.
Reverse: (thread, local) -> (i=K=local, j=M=thread%16)
Forward: B[i=K, j=N] -> (thread=N, local=K%16). ATTN: Here we only reflect (i, j) to the lower-half-lane of threads in a warp.
Reverse: (thread, local) -> (i=K=local, j=N=thread%16)
Forward: B_T[i=N, j=K] -> (thread=i, local=j%16). ATTN: Here we only reflect (i, j) to the lower-half-lane of threads in a warp.
Reverse: (thread, local) -> (j=K=local, i=N=thread%16)
Forward: D[i=M, j=N] -> (thread=(i%2)*16+j, local=i//2).
Reverse: (thread, local) -> (i=M=(thread//16)+local*2, j=N=thread%16)
- tilelang.intrinsics.wmma_layout.wmma_store_index_map_gfx11(thread_id, local_id)¶
(thread, local) -> (M, N) in D. Hardware D layout.
- tilelang.intrinsics.wmma_layout.fragment_forward_A_gfx11(i, j, rep)¶
Replicated fragment forward map for gfx11 A.
The canonical owner lives in the lower half-wave and rep selects whether the logical element is materialized in the lower or upper half-wave copy.
- tilelang.intrinsics.wmma_layout.fragment_forward_A_colmajor_gfx11(i, j, rep)¶
Replicated fragment forward map for gfx11 transposed A.
- tilelang.intrinsics.wmma_layout.fragment_forward_B_gfx11(i, j, rep)¶
Replicated fragment forward map for gfx11 B.
- tilelang.intrinsics.wmma_layout.fragment_forward_B_colmajor_gfx11(i, j, rep)¶
Replicated fragment forward map for gfx11 transposed B.
- tilelang.intrinsics.wmma_layout.get_wmma_a_layout_funcs(rdna_gen, transposed)¶
Return (forward_map, reverse_map) for A layout.
- Parameters:
rdna_gen (int)
transposed (bool)
- tilelang.intrinsics.wmma_layout.get_wmma_b_layout_funcs(rdna_gen, transposed)¶
Return (forward_map, reverse_map) for B layout.
- Parameters:
rdna_gen (int)
transposed (bool)
- tilelang.intrinsics.wmma_layout.get_wmma_c_layout_funcs(rdna_gen)¶
Return (forward_map, reverse_map) for C/D layout.
- Parameters:
rdna_gen (int)
- tilelang.intrinsics.wmma_layout.get_wmma_store_index_map_func(rdna_gen)¶
Return the (thread_id, local_id) -> (row, col) store map.
- Parameters:
rdna_gen (int)
- tilelang.intrinsics.wmma_layout.get_wmma_a_fragment_forward_func(rdna_gen, transposed)¶
Return the fragment forward function for A layout.
- Parameters:
rdna_gen (int)
transposed (bool)
- tilelang.intrinsics.wmma_layout.get_wmma_b_fragment_forward_func(rdna_gen, transposed)¶
Return the fragment forward function for B layout.
- Parameters:
rdna_gen (int)
transposed (bool)
- tilelang.intrinsics.wmma_layout.get_wmma_fragment_replicate_count(rdna_gen)¶
Return the fragment replicate count used for logical one-to-many owners.
- Parameters:
rdna_gen (int)